/****************************************************************/
/* Program uses the Timer0 to trigger a convst# pulse, at xxkHz */
/* using EDMA channel 4. 		                                */ 
/*	Inverted BUSY signal is used to trigger EDMA channel 4 to	*/
/*	read from A/D and store data into ad_buffer.  Once BLOCK_SZ	*/
/* 	of data is captured, the EDMA will interrupt CPU.  CPU will */
/* 	then  post software interrupt with will mask off the top    */
/*  The data is stored in Fbuffer.  The program then repeats.   */
/*   18 bits of 32 bit word.                                    */
/* Hardware Connections:										*/
/* 	CS# => CE2# 												*/
/*	RD# => Generated from 2-4 decoder mapped to 0xA0000010-ff	*/
/*	CONVST# =>													*/
/*	BUSY => Inverted then wired to EXTERNAL INT6				*/
/****************************************************************/
//  DSP 1 <=> TMS320C6711
#define _in_CONFIG_A2D3A_CPP_
#include "mmaccfg.h"
#include "A2D2A.h"
#include "dsk_lib.h"

unsigned int temp, n=0; 

void init_A2D2A(void)
{
	int i;
	
   	init_memory();  /* initialize the EMIF*/
      
  /* initialize the EDMA*/
  	IRQ_reset(IRQ_EVT_EDMAINT);					/*Reset EDMA interrupt 		*/
  	EDMA_intDisable(TCCINTNUM);					/*Disable EDMA interrupt 	*/
  	EDMA_intClear(TCCINTNUM);					/*Clear EDMA interrupt 		*/
   	EDMA_intEnable(TCCINTNUM);      			/*Enable EDMA interrupt		*/
  	
  	for (i=0; i<AD_BLOCK_SZ; i++) ad_buffer[i]=ZERO_0V_A2D;	/*Initialize data buffers	*/
    for (i=0; i<DA_BLOCK_SZ; i++) da_buffer[i]=ZERO_V_D2A; /*Initialize data buffers	*/
         
    
                               
  /*Configuration of Timer0, EDMA channels 2 and 6 where during before entering main.c*/
/*Only need to enable them in main. */

	TIMER_start(hTimer0);
 // Initialize the variables for the "Void hwiDMA_isr(Void)"
    
 	/* Enable the EDMA controller interrupt */
  	IRQ_enable(IRQ_EVT_EDMAINT);

 
 // DSP to DSP Communications setup:
 // Serial port 1 McBSP1 starts:
 
	MCBSP_enableSrgr(hMcbsp1); 	//Enable the sample rate generator for the given port.
	for (i=0; i<32; i++) i++;       /* Wait states after SRG starts */
   
        
	MCBSP_enableRcv(hMcbsp1); /* Enable McBSP port 1 as the receiver */	
    MCBSP_enableXmt(hMcbsp1);	//Enable the transmitter for the given port.								  // transmit register, DXR.
 	MCBSP_enableFsync(hMcbsp1);	//Enable the frame sync generator for the given port.
 	//MCBSP_write(hMcbsp1,0x5005a4a1);
 
     
   // Setup the framesinc interrupt from the McBSP receiver for initialization 
    IRQ_map(IRQ_EVT_RINT1,11);
    IRQ_reset(IRQ_EVT_RINT1);			/*Reset McBSP interrupt 		*/
    IRQ_disable(IRQ_EVT_RINT1);
    IRQ_clear(IRQ_EVT_RINT1);
  	IRQ_enable(IRQ_EVT_RINT1);	/* Enable the McBSP controller interrupt */

 
    LOG_printf(&trace, "GO DSK! \n"); 				/*Go sample at 490kHz*/
}
          
/****************************************************************/
/* end init_A2D2A.c	                                            	*/
/****************************************************************/


/****************************************************************/
/* init_dsk()                                                   */
/* This initializes the EMIF                                    */
/****************************************************************/
void init_memory(void)
{                          
    UINT32 gblctl,ce0ctl,ce1ctl,ce2ctl,ce3ctl,sdctl,sdtim,sdext;

    /* intialization of the EMIF */
    
    /* RBTR8,SSCRT,CLK2EN,CLK1EN,SSCEN,SDCEN,NOHOLD       */
    gblctl = EMIF_MK_GBLCTL( 0, 0, 1, 0, 0, 0, 0);   // EMIF global control 

    /* RDHLD,MTYPE,RDSTRB,TA,RDSETUP,WRHLD,WRSTRB,WRSETUP */
      ce0ctl = EMIF_MK_CECTL( 0, 3, 0, 0, 0, 0, 0, 0); //EMIF CE0 space control

    /* RDHLD,MTYPE,RDSTRB,TA,RDSETUP,WRHLD,WRSTRB,WRSETUP */
   // ce1ctl = EMIF_MK_CECTL( 0, 2, 0, 0, 0, 0, 0, 0); 
   
	/* make CE1 control register value                    */
    /* This is the CE space used by the I/O space.      */
    /* Use the timing values from dc_conf.h:              */
    ce1ctl = EMIF_MK_CECTL(
        EMIF_CECTL_RDHLD_OF   (RDHLD1),     /* read  hold   */
        EMIF_CECTL_MTYPE_ASYNC32,
        EMIF_CECTL_RDSTRB_OF  (RDSTRB1),    /* read  strobe */
        EMIF_CECTL_TA_NA,
        EMIF_CECTL_RDSETUP_OF (RDSETUP1),   /* read  setup  */
        EMIF_CECTL_WRHLD_OF   (WRHLD1),     /* write hold   */
        EMIF_CECTL_WRSTRB_OF  (WRSTRB1),    /* write strobe */
        EMIF_CECTL_WRSETUP_OF (WRSETUP1) );   /* write setup  */
    


	/* make CE2 control register value                    */
    /* This is the CE space used by the ADS8383 EVM.      */
    /* Use the timing values from dc_conf.h:              */
    ce2ctl = EMIF_MK_CECTL(
        EMIF_CECTL_RDHLD_OF   (RDHLD),     /* read  hold   */
        EMIF_CECTL_MTYPE_ASYNC32,
        EMIF_CECTL_RDSTRB_OF  (RDSTRB),    /* read  strobe */
        EMIF_CECTL_TA_NA,
        EMIF_CECTL_RDSETUP_OF (RDSETUP),   /* read  setup  */
        EMIF_CECTL_WRHLD_OF   (WRHLD),     /* write hold   */
        EMIF_CECTL_WRSTRB_OF  (WRSTRB),    /* write strobe */
        EMIF_CECTL_WRSETUP_OF (WRSETUP) );   /* write setup  */
    
		
    /* RDHLD,MTYPE,RDSTRB,TA,RDSETUP,WRHLD,WRSTRB,WRSETUP */
    ce3ctl = EMIF_MK_CECTL( 0, 2, 0, 0, 0, 0, 0, 0);

    /* TRC,TRP,TRCD,INIT,RFEN,SDWID,SDCSZ,SDRSZ,SDBSZ     */ 
    sdctl = EMIF_MK_SDCTL( 7, 1, 1, 1, 1, 0, 1, 0, 0); // EMIF SDRAM control

    /* PERIOD,XRFR */
    sdtim = EMIF_MK_SDTIM(   1562,   0); // EMIF SDRAM refresh control

    sdext = EMIF_SDEXT_NA; //EMIF SDRAM extension

    

    /* configure the EMIF */
    EMIF_ConfigB(gblctl,ce0ctl,ce1ctl,ce2ctl,ce3ctl,sdctl,sdtim,sdext);  

    return;
} /* end init_dsk() */


/****************************************************************/
/* End Functions.c                                              */
/****************************************************************/



/*–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
/* set_interrupts_edma()  
   DSP 2 DSP communication:   */
/*–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––*/

extern "C" {
Void McBSPnewFrameIsr(Void) ;}

Void McBSPnewFrameIsr(Void) 
{
     LED_on(2);  //In Serial Port Receive interrupt
      /* Reinitialize the EDMA for the frmesinc pulse */ 
    EDMA_config(hEdmaCha15, &edma_McBsp1R);
    EDMA_enableChannel(hEdmaCha15);
   
     LED_off(2); //In Serial Port Receive interrupt
       
	//IRQ_clear(IRQ_EVT_RINT1);
   }